Blog
Notes from the team building the system for autonomous silicon verification.
- GPT-Synopsys and the models we can put to workOpenAI and Synopsys are developing a model for chip design. What they announced, why we’re considering open models and fine-tuning, and what we might build around a chip as more of its engineering becomes autonomous.
- Grading the whole chip programHardware AI is graded one task at a time, and chip programs run for years. Here’s how we’re going to grade an agent across a whole program, the six levels of autonomy we’ll grade it against, and what we’ll publish soon.
- The next rungEvery era of the chip industry has let more companies build chips, and every time the market got bigger. The barrier left is engineering. Here’s why we think autonomous verification is the next rung.
- See you at Hot ChipsOur team’s at Hot Chips, August 23–25 at Stanford. Before we go, why this year’s DAC was different, a write‑up from it that’s worth your time, and what we’ll be watching.
- See you at DACOur team’s at DAC, July 26–29 at the Long Beach Convention Center. We’re going to listen, we’re bringing a chip you can take apart, and we’re hiring.
