How it works · Tapeout Labs

Say an engineer changes one line in the firewall of your inference chip. Here’s what happens next. Ledger, our first tool, records every run, log, revision and result along the way, inside your environment. You’ll watch the agents learn the design, record a baseline, trace the failure to the transaction that changed and carry the history through the fix.

01/08

Index the design

Ledger reads every RTL file in the SoC into one graph you can query.

Today: Scattered across scripts; Filelists, Tcl scripts, include paths and owners’ notes, rebuilt by hand for each question.
With Tapeout: One graph, kept current; Every RTL file is elaborated once and kept current on each revision, so you can query it from any block down to a single net.

02/08

Query the design

Ask what can influence the key store, and every block on the path lights up.

Today: Grep and memory; Tracing what reaches the key store means reading RTL across several owners’ blocks.
With Tapeout: Asked in one line; Ask the graph in plain words, and it walks you through every block on the path.

$ tof ask "what can influence the key store?"

core

interconnect

NPU

DMA

boot ROM

memory controller

host port

firewall

key store

03/08

Set a baseline

On the first revision every check passes, and the chip’s AI accelerator returns exactly the numbers a Python reference model predicts, down to the last bit.

Today: Results in logs; A passing regression leaves logs and a date, rarely a record of what it proved.
With Tapeout: Recorded as evidence; Each passing check goes on the ledger with the run, vectors and waveform that proved it.

✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓

npu bit-for-bit against the Python model ✓

04/08

One character changes

A new firewall revision reads an AXI protection bit backwards.

Today: Everything in doubt; After a late RTL change, no one can say which results are still valid.
With Tapeout: Reach computed; The graph works out what the change can affect before anything reruns.

rtl/axi_firewall.sv rev 1 → rev 2

41  // AxPROT[1]: 0 = secure, 1 = non-secure42  always_comb begin43-   is_secure  = ~s_axi_awprot[1];43+   is_secure  =  s_axi_awprot[1];44    allow_key  = is_secure & sel_keystore;45  end

one character

05/08

What is still valid

The kernel checks every earlier result against the change. The security checks fail, and every other result still holds.

Today: Full rerun; The whole regression reruns to rediscover that most checks still pass.
With Tapeout: Sorted by the kernel; Results that still hold stay, and the agents only rerun the tests and proofs the change could have affected.

✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓✓

✓ still pass✕ security checks fail

06/08

The exact transaction

At 4,430 ns a non-secure write to key 1 returns OKAY.

Today: Waveforms by hand; An engineer opens dumps from two revisions and lines them up signal by signal.
With Tapeout: Traced to the transaction; The agents run the same stimulus on both revisions and show you where they split, at 4,430 ns, with the waveform attached.

4,430 ns non-secure write to key 1 returns OKAY

07/08

Fix it, keep the history

The agents revert the firewall, and Ledger records the whole history as pass, fail, pass.

Today: History overwritten; The fix lands and the failing revision’s evidence is gone with it.
With Tapeout: Kept on the ledger; The ledger keeps r1 passing, r2 failing and r3 passing again, each with the evidence behind it.

rev 13f9a1c2baseline, checks pass
rev 28b04e7dfirewall edit, security checks fail
rev 3d51c9a0revert · digest = rev 1, checks pass

history kept · pass → fail → pass

08/08

Cross-check

A second simulator runs the same design digest and agrees on every check.

Today: One tool’s word; Each result rests on a single simulator run.
With Tapeout: Confirmed twice; The agents rerun the same design on a second simulator, and it agrees on every check.

simulator 1Primarydigest 9c1e…4b7a

simulator 2Independentdigest 9c1e…4b7a

every check agrees

Verify your next chip with Ledger.

The agents run on your machines, against your RTL, testbenches and tools, and carry every result through to signoff.

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